A VLSI architecture for a run-time multi-precision reconfigurable booth multiplier

Erstveröffentlichung
2007Authors
Shun, Zhou
Pfaender, Oliver A.
Pfleiderer, Hans-Joerg
Bermak, Arnine
Beitrag zu einer Konferenz
Published in
14th IEEE International Conference on Electronics, Circuits and Systems, 2007. - New York : IEEE, 2007. - (IEEE International Conference on Electronics, Circuits and Systems). - S. 975-978. - ISBN 978-1-4244-1377-5
Link to publication
https://dx.doi.org/10.1109/ICECS.2007.4511155Faculties
Fakultät für Ingenieurwissenschaften, Informatik und PsychologieInstitutions
Institut für MikroelektronikConference
14th IEEE International Conference on Electronics, Circuits and Systems, 2007-12-11 - 2007-12-14, Marrakech