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AuthorChu, Chaodc.contributor.author
Date of accession2017-12-01T14:23:00Zdc.date.accessioned
Available in OPARU since2017-12-01T14:23:00Zdc.date.available
Year of creation2017dc.date.created
Date of first publication2017-12-01dc.date.issued
AbstractModern wireless communication systems demand wideband ADCs with high resolution and high linearity. Among different ADC topologies, CT Delta Sigma modulators are very popular due to inherent anti-aliasing filtering and relative insensitivity to circuit non-idealities. By combining the advantages of oversampling and noise shaping, CT Delta Sigma modulators enhance the SQNR performance covering a signal bandwidth from several tens of kHz up to tens of MHz. This work presents a 15MHz bandwidth, CT Delta Sigma modulator with a 70dB dynamic range designed for a high input frequency RF receiver. The high speed and high linearity requirements of such a receiver for signal above 5GHz require to employ a SiGe technology with sufficiently high transit frequency. Thus, the employed high-speed ADC must also be implemented in the same SiGe technology. To meet the target specifications of 12-bit resolution, 14-bit linearity and better than 10MHz bandwidth, a third-order single-loop CT Delta Sigma modulator with a single-bit quantizer was chosen to operate at 1.92GHz, as a reasonable compromise between sampling frequency and circuit complexity. Since the single-bit internal quantizer is inherently linear, no digital DAC linearization technique is required. All the op-amps in the modulator have been designed to feature a finite GBW of 1.5fs, and the differentiator based ELD compensation method has been extended to counteract the effect of these finite GBW. Fabricated in a 0.25um SiGe BiCMOS technology, the experimental prototype chip achieves 66.5dB SNDR and 78.1dB SFDR for a signal bandwidth of 15MHz. It dissipates 215.9mW and occupies an active area of 0.4mm^2.dc.description.abstract
Languageen_USdc.language.iso
PublisherUniversität Ulmdc.publisher
LicenseStandarddc.rights
Link to license texthttps://oparu.uni-ulm.de/xmlui/license_v3dc.rights.uri
KeywordDelta Sigma Modulatordc.subject
KeywordADCdc.subject
KeywordContinous-timedc.subject
Dewey Decimal GroupDDC 620 / Engineering & allied operationsdc.subject.ddc
LCSHAnalog-to-digital convertersdc.subject.lcsh
LCSHSignal processingdc.subject.lcsh
LCSHModulators (Electronics)dc.subject.lcsh
TitleA high speed/high linearity continuous-time delta-sigma modulatordc.title
Resource typeDissertationdc.type
Date of acceptance2017-10-23dcterms.dateAccepted
RefereeOrtmanns, Mauritsdc.contributor.referee
RefereeGerfers, Friedeldc.contributor.referee
DOIhttp://dx.doi.org/10.18725/OPARU-4558dc.identifier.doi
PPN100762910Xdc.identifier.ppn
URNhttp://nbn-resolving.de/urn:nbn:de:bsz:289-oparu-4597-5dc.identifier.urn
GNDModulatordc.subject.gnd
GNDAnalog-Digital-Umsetzerdc.subject.gnd
GNDSigma-Delta-Wandlerdc.subject.gnd
FacultyFakultät für Ingenieurwissenschaften, Informatik und Psychologieuulm.affiliationGeneral
InstitutionInstitut für Mikroelektronikuulm.affiliationSpecific
Shelfmark print versionW: W-H 15.330uulm.shelfmark
Grantor of degreeFakultät für Ingenieurwissenschaften, Informatik und Psychologieuulm.thesisGrantor
DCMI TypeTextuulm.typeDCMI
TypeErstveröffentlichunguulm.veroeffentlichung
CategoryPublikationenuulm.category
Bibliographyuulmuulm.bibliographie


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