Pulse modulation techniques for switched-mode transmitter

Abstract

Nowadays more and more communication devices incorporate multiple transceivers operating in different frequency bands. To reduce form factor and power consumption of such devices, a fully digital, multi-standard, multiband transmitter is highly demanded. In modern communication systems, the peak-to-average ratio of the transmitted signals is often more than 10 dB. This means that the power amplifier has to operate in significant back-off from its compression point, where the classical amplifier architectures suffer from very low efficiency. The class-S power amplifier may provide a potential solution to such a transmitter because it incorporates an amplifier which is operating in the switch mode where 100% efficiency can be theoretically approached. A nonlinear switch mode power amplifier can be linearized if driven by a pulse encoder and followed by a bandpass filter. The efficiency and available power of a class-S power amplifier are highly dependent on the employed pulse encoding technique. Within the framework of this thesis, the main characteristics of pulse modulators and their limitations while driving different classes of switch-mode power amplifiers are discussed. The definitions of the pulse encoder parameters are given and the performance of several pulse encoder architectures was compared for the case when they are driven by a real communication signal. For class-S power amplifier demonstrators, at three different operating frequencies (450 MHz, 900 MHz and 2.1-2.2 GHz), the corresponding bandpass delta-sigma modulators (DSMs) have been developed. For the latter two cases, the switching speed of power transistors was not high enough and common DSM architectures were not applicable. For example, for the 2.1-2.2 GHz class-S demonstrator the maximum required sampling frequency of the DSM was limited to 5 GHz. Thus, a design procedure for a 5 GS/s 2.1-2.2 GHz center frequency DSM has been established. The developed bandpass DSM enabled the implementation of the complete class-S power amplifier at 2.1-2.2 GHz carrier frequencies. In the successive steps of the study, a new fully digital pulse encoder architecture has been developed. The results of comparison of this pulse encoding technique with the state-of-the-art have been presented. Finally, the performance of the proposed digital polar modulator was demonstrated by driving a real class-F power amplifier at 2.1 GHz