Fully integrated, multichannel IC for brain machine interfaces

Abstract

The rapid progress of technology in the semiconductor industry over the last decades allowed the development of a whole new generation of fully integrated neuromodulators. By an increase in the level of integration, new systems on chip (SoCs) that allow the simultaneous recording and stimulation of nervous signals were developed. These chips enable implantable, medical devices, capable of providing so far unreachable spatiotemporal resolution, while eliminating inflammation prone through-skin wires. The ongoing demand for higher spatial resolution, together with the tight power and size requirements imposed by implantation needs, result in growing challenges for the integrated circuit design.

Besides the fundamental requirements for power, area and noise, the unknown, biological system itself imposes the biggest challenge. Since the observable signals and the required stimulation patterns heavily depend on the physiology of each individual, all systems require high flexibility and maximum adaptability to the patient. The presented work deals with that challenge and presents new circuit architectures, that allow the reconfiguration of the recording system as well as the stimulation system to the current neurological state, while being implanted.

In the recording subsystem, a new tuning mechanism for the low noise amplifier is presented. It provides a flexible trade-off between noise performance and amplifier bandwidth, to adapt the recorder to the currently observed, neural signal. Further, electrode impedance estimation was introduced with a new low-gain recording mode. Thereby, the recorder is reused to acquire the impulse response of the electrode, which allows to detect broken wires or electrode degradation due to electrochemical processes.

In order to provide maximum flexibility for the stimulation, a novel, high voltage (HV) stimulator was developed, which is capable of providing current and voltage controlled, arbitrary stimulation waveforms. This was achieved by a new, semi-digital feedback loop, which controls the output current of the current stimulator in order to achieve the desired electrode voltage. Thereby, power efficient class-B operation is achieved, while requiring only little area overhead, as the full HV output stage is reused.

Both subsystems were combined, together with two high resolution analog to digital converters (ADCs), in a 32 channel SoC, which provides significant advantages for future implants by minimizing the required amount of off-chip components. Furthermore, integrated electrode monitoring improves patient safety and the increased flexibility in recording and stimulation improves the freedom in the design of experiments and therapies.