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High linearity Sigma-Delta-enhanced SAR ADCs

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Erstveröffentlichung
2019-06-11
Authors
AlMarashli, Ahmad
Referee
Ortmanns, Maurits
Dissertation


Faculties
Fakultät für Ingenieurwissenschaften, Informatik und Psychologie
Institutions
Institut für Mikroelektronik
Abstract
SAR ADCs recorded the highest power efficiency in the last decade, while employing a simple architecture and making a perfect use of the advanced digital capabilities in modern deeply-scaled CMOS technologies. Recently, there is an increased importance of high-resolution high-linearity Nyquist-rate ADCs with multiplexing capabilities, in areas like environmental and medical applications. Simultaneously, high power efficiency and low-area consumption are essential features to enable efficient implementations in battery-powered and/or hand-held devices. The state-of-the-art for high-linearity ADCs is dominated by oversampling ADCs, which do not allow multiplexing. On the other hand, available high-linearity Nyquist-rate ADCs require high-power and large chip area for matching enhancement, linearization and calibration techniques. Additionally, these ADCs prefer older technologies for advantageous analog processing. Also, highly-efficient SAR ADCs currently present limited linearity and resolution. This work aims to introduce novel concepts for SAR ADCs, which enable high-linearity A/D conversion with reliance neither on extensive digital linearization nor on large chip area. Instead, the proposed concept makes use of an intrinsically linear Sigma Delta DAC, to enhance the linearity of the SAR ADC. To implement this proposal, two system architectures are introduced and compared to available solutions in the state-of-the-art. Also, system-level design choices are discussed with pros and cons. A prototype in a 40 nm CMOS technology was implemented and measured to validate the proposed technique. The measured linearity of the prototype competes the state-of-the-art for high-linearity power-efficient Nyquist-rate ADCs, while occupying the smallest active chip area, with good stability over PVT variations. The proposed concept, with silicon-validated performance, advances the state-of-the-art for high-linearity, scaling-friendly, simple and power-efficient Nyquist-rate ADCs.
Date created
2018
Subject headings
[GND]: Sigma-Delta-Wandler | Kalibrieren <Messtechnik>
[LCSH]: Redundancy (Engineering) | Calibration | Successive approximation analog-to-digital converters
[Free subject headings]: SAR ADC | Sigma delta | Nyquist ADC | High resolution | Self calibration | High resolution DAC | SD DAC | Oversampling | High SFDR
[DDC subject group]: DDC 620 / Engineering & allied operations
License
Standard
https://oparu.uni-ulm.de/xmlui/license_v3

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DOI & citation

Please use this identifier to cite or link to this item: http://dx.doi.org/10.18725/OPARU-15015

AlMarashli, Ahmad (2019): High linearity Sigma-Delta-enhanced SAR ADCs. Open Access Repositorium der Universität Ulm und Technischen Hochschule Ulm. Dissertation. http://dx.doi.org/10.18725/OPARU-15015
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