Measurement data of the publication: "In-depth Analysis and Enhancements of RO-PUFs with a Partial Reconfiguration Framework on Xilinx Zynq-7000 SoC FPGAs"
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Erstveröffentlichung
2019-05-14Forschungsdaten
Faculties
Fakultät für Ingenieurwissenschaften, Informatik und PsychologieInstitutions
Institut für MikroelektronikConference
IEEE International Symposium on Hardware Oriented Security and Trust (HOST) - 2019, 2019-05-06 - 2019-05-10, Tyson Corner, USA
Abstract
The presented measurement data is the base of the publication "In-depth Analysis and Enhancements of RO-PUFs with a Partial Reconfiguration Framework on Xilinx Zynq-7000 SoC FPGAs"
presented on May 9th, 2019 at IEEE International Symposium on Hardware Oriented Security and Trust (HOST) 2019.
The measurement data is presented in two formats, as comma-separated values (.csv) and as native matlab files (.mat).
Three different data sets are provided with different hardware settings, as discussed in the publication: old-ro, new-ro and carry-4.
Therefore, 6 different files are available.
Date created
2018
Is supplement to
https://doi.org/10.1109/HST.2019.8740832Subject Headings
Hardware [GND]Computer engineering [LCSH]
Field programmable gate arrays; Design and construction [LCSH]
Hardware; Tables [LCSH]
Keywords
Field programmable gate arrayDewey Decimal Group
DDC 620 / Engineering & allied operationsMetadata
Show full item recordCitation example
Herkle, Andreas et al. (2019): Measurement data of the publication:
"In-depth Analysis and Enhancements of RO-PUFs with a Partial Reconfiguration Framework on Xilinx Zynq-7000 SoC FPGAs". Open Access Repositorium der Universität Ulm. http://dx.doi.org/10.18725/OPARU-14107
Except where otherwise noted, this item's license is described as CC BY 4.0 International